Optimizing correlation algorithms for hardware-based transient classification

R. Timothy Edwards, Gert Cauwenberghs, Fernando J Pineda

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

The performance of dedicated VLSI neural processing hardware depends critically on the design of the implemented algorithms. We have previously proposed an algorithm for acoustic transient classification [1]. Having implemented and demonstrated this algorithm in a mixed-mode architecture, we now investigate variants on the algorithm, using time and frequency channel differencing, input and output normalization, and schemes to binarize and train the template values, with the goal of achieving optimal classification performance for the chosen hardware.

Original languageEnglish (US)
Title of host publicationAdvances in Neural Information Processing Systems
PublisherNeural information processing systems foundation
Pages678-684
Number of pages7
ISBN (Print)0262112450, 9780262112451
StatePublished - 1999
Event12th Annual Conference on Neural Information Processing Systems, NIPS 1998 - Denver, CO, United States
Duration: Nov 30 1998Dec 5 1998

Other

Other12th Annual Conference on Neural Information Processing Systems, NIPS 1998
CountryUnited States
CityDenver, CO
Period11/30/9812/5/98

Fingerprint

Hardware
Acoustics
Processing

ASJC Scopus subject areas

  • Computer Networks and Communications
  • Information Systems
  • Signal Processing

Cite this

Edwards, R. T., Cauwenberghs, G., & Pineda, F. J. (1999). Optimizing correlation algorithms for hardware-based transient classification. In Advances in Neural Information Processing Systems (pp. 678-684). Neural information processing systems foundation.

Optimizing correlation algorithms for hardware-based transient classification. / Edwards, R. Timothy; Cauwenberghs, Gert; Pineda, Fernando J.

Advances in Neural Information Processing Systems. Neural information processing systems foundation, 1999. p. 678-684.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Edwards, RT, Cauwenberghs, G & Pineda, FJ 1999, Optimizing correlation algorithms for hardware-based transient classification. in Advances in Neural Information Processing Systems. Neural information processing systems foundation, pp. 678-684, 12th Annual Conference on Neural Information Processing Systems, NIPS 1998, Denver, CO, United States, 11/30/98.
Edwards RT, Cauwenberghs G, Pineda FJ. Optimizing correlation algorithms for hardware-based transient classification. In Advances in Neural Information Processing Systems. Neural information processing systems foundation. 1999. p. 678-684
Edwards, R. Timothy ; Cauwenberghs, Gert ; Pineda, Fernando J. / Optimizing correlation algorithms for hardware-based transient classification. Advances in Neural Information Processing Systems. Neural information processing systems foundation, 1999. pp. 678-684
@inproceedings{784f19fce48f414a80692d2217b012bb,
title = "Optimizing correlation algorithms for hardware-based transient classification",
abstract = "The performance of dedicated VLSI neural processing hardware depends critically on the design of the implemented algorithms. We have previously proposed an algorithm for acoustic transient classification [1]. Having implemented and demonstrated this algorithm in a mixed-mode architecture, we now investigate variants on the algorithm, using time and frequency channel differencing, input and output normalization, and schemes to binarize and train the template values, with the goal of achieving optimal classification performance for the chosen hardware.",
author = "Edwards, {R. Timothy} and Gert Cauwenberghs and Pineda, {Fernando J}",
year = "1999",
language = "English (US)",
isbn = "0262112450",
pages = "678--684",
booktitle = "Advances in Neural Information Processing Systems",
publisher = "Neural information processing systems foundation",

}

TY - GEN

T1 - Optimizing correlation algorithms for hardware-based transient classification

AU - Edwards, R. Timothy

AU - Cauwenberghs, Gert

AU - Pineda, Fernando J

PY - 1999

Y1 - 1999

N2 - The performance of dedicated VLSI neural processing hardware depends critically on the design of the implemented algorithms. We have previously proposed an algorithm for acoustic transient classification [1]. Having implemented and demonstrated this algorithm in a mixed-mode architecture, we now investigate variants on the algorithm, using time and frequency channel differencing, input and output normalization, and schemes to binarize and train the template values, with the goal of achieving optimal classification performance for the chosen hardware.

AB - The performance of dedicated VLSI neural processing hardware depends critically on the design of the implemented algorithms. We have previously proposed an algorithm for acoustic transient classification [1]. Having implemented and demonstrated this algorithm in a mixed-mode architecture, we now investigate variants on the algorithm, using time and frequency channel differencing, input and output normalization, and schemes to binarize and train the template values, with the goal of achieving optimal classification performance for the chosen hardware.

UR - http://www.scopus.com/inward/record.url?scp=84899005638&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84899005638&partnerID=8YFLogxK

M3 - Conference contribution

SN - 0262112450

SN - 9780262112451

SP - 678

EP - 684

BT - Advances in Neural Information Processing Systems

PB - Neural information processing systems foundation

ER -